Master Thesis at Department of Architecture Engineering on “The Architecture Design of Forward Error Correction Type Low Density Parity Check”
admin_omar2023-04-14T19:08:23+00:00A Master thesis was discussed in Department of Architecture Engineering / College of Engineering / University of Mosul entitled "The Architecture Design of Forward Error Correction Type Low Density Parity Check" on Sunday, Sep. 5, 2021, submitted by postgraduate student (Arwa Hafidh Ali).The thesis aims to design LDPC architectures in transmitter and receiver using Vivado High-Level Synthesis (HLS) and C++ programming language based on Field-Programmable Gate Array (FPGA). Likewise, it has applied Zynq-7000 hardware to implement the Vivado HLS designs. Moreover, reliable communication over the noisy channel has been implemented by the hardware of LDPC code.The thesis dealt with design and [Read More]